Searched refs:C_DDR_REG_TIMING0 (Results 1 - 2 of 2) sorted by relevance
| /openwrt/package/boot/uboot-oxnas/files/board/ox820/ | ||
| H A D | ddr.h | 111 #define C_DDR_REG_TIMING0 (DDR_BASE + 0x34) macro |
| H A D | ddr.c | 141 *(volatile UINT *) C_DDR_REG_TIMING0 = reg_tmp; |
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