Searched refs:C_DDR_REG_PHY_TIMING (Results 1 - 2 of 2) sorted by relevance
/openwrt/package/boot/uboot-oxnas/files/board/ox820/ | ||
H A D | ddr.h | 133 #define C_DDR_REG_PHY_TIMING (DDR_PHY_BASE + 0x50) macro |
H A D | ddr.c | 165 *(volatile UINT *) C_DDR_REG_PHY_TIMING = reg_tmp; |
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