Searched refs:qst (Results 1 - 7 of 7) sorted by relevance
/opensolaris-onvv-gate/usr/src/lib/libbc/libc/gen/common/ |
H A D | qsort.c | 46 static void qst(char *, char *); 50 * First, set up some global parameters for qst to share. Then, quicksort 51 * with qst(), and then a cleanup insertion sort ourselves. Sound simple? 69 qst(base, max); 113 * qst: 128 qst(char *base, char *max) function 214 qst(base, j); 219 qst(i, max);
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/opensolaris-onvv-gate/usr/src/uts/common/io/hxge/ |
H A D | hpi_rxdma.c | 71 while ((count--) && (cfg.bits.qst == 0)) { 76 if (cfg.bits.qst == 0) 106 while ((count--) && (cfg.bits.qst == 1)) { 110 if (cfg.bits.qst == 1) { 138 while ((count--) && (cfg.bits.qst == 0)) {
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H A D | hpi_txdma.c | 450 if (txcs.bits.qst) { 475 if (txcs.bits.qst) {
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H A D | hxge_rdc_hw.h | 115 * The usage of enable, reset, and qst is as follows. Software 117 * set DMA.enable to 0, wait for DMA.qst=1 and then, set DMA.reset to 118 * 1. After DMA.reset is cleared by hardware and the DMA.qst is set 123 * indicated by the value of the DMA.qst. An example of DMA.enable 147 uint32_t qst:1; member in struct:__anon5877::__anon5878 153 uint32_t qst:1;
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H A D | hxge_tdc_hw.h | 111 * The usage of enable, reset, and qst is as follows. Software 113 * set DMA.enable to 0, wait for DMA.qst=1 and then, set DMA.reset to 114 * 1. After DMA.reset is cleared by hardware and the DMA.qst is set 119 * indicated by the value of the DMA.qst. An example of DMA.enable 138 * EOP, it is possible that the qst bit will not be set even 154 uint32_t qst:1; member in struct:__anon5967::__anon5968 166 uint32_t qst:1;
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/opensolaris-onvv-gate/usr/src/uts/common/io/nxge/npi/ |
H A D | npi_rxdma.c | 387 while ((count--) && (cfg.bits.ldw.qst == 0)) { 393 if (cfg.bits.ldw.qst == 0) { 412 while ((count--) && (cfg.bits.ldw.qst == 0)) { 417 if (cfg.bits.ldw.qst == 0) {
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/opensolaris-onvv-gate/usr/src/uts/common/sys/nxge/ |
H A D | nxge_rxdma_hw.h | 378 uint32_t qst:1; member in struct:_rxdma_cfig1_t::__anon8610::__anon8611 384 uint32_t qst:1;
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