Searched refs:HXGE_REG_RD32 (Results 1 - 7 of 7) sorted by relevance

/opensolaris-onvv-gate/usr/src/uts/common/io/hxge/
H A Dhpi_vir.c109 HXGE_REG_RD32(handle, offset, ldf_p);
165 HXGE_REG_RD32(handle, LD_INTR_MGMT + LDSV_OFFSET(ldg),
259 HXGE_REG_RD32(handle, DEV_ERR_STAT, &statp->value);
H A Dhxge_common_impl.h189 #define HXGE_REG_RD32(handle, offset, val_p) { \ macro
213 #define HXGE_REG_RD32(handle, offset, val_p) { \ macro
H A Dhpi_rxdma.h116 HXGE_REG_RD32(handle, (HXGE_RXDMA_OFFSET(reg, handle.is_vraddr,\
H A Dhpi_pfc.c925 HXGE_REG_RD32(handle, HCR_REG + HCR_N_MAC_ADDRS, n_of_addrs);
942 HXGE_REG_RD32(handle, HCR_REG + HCR_ADDR_LO + slot * step, &addr_lo);
943 HXGE_REG_RD32(handle, HCR_REG + HCR_ADDR_HI + slot * step, &addr_hi);
H A Dhxge_hw.c234 HXGE_REG_RD32(handle, PEU_INTR_STAT, &stat.value);
H A Dhxge_main.c4423 HXGE_REG_RD32(handle, CIP_LINK_STAT, &link_stat.value);
4486 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16, &msix_entry0);
4487 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 4, &msix_entry1);
4488 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 8, &msix_entry2);
4489 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 12, &msix_entry3);
H A Dhxge_pfc.c154 HXGE_REG_RD32(hxgep->hpi_reg_handle, PHY_DEBUG_TRAINING_VEC,

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