/openbsd-current/sys/dev/pci/drm/radeon/ |
H A D | radeon_vce.c | 50 * radeon_vce_init - allocate memory, load vce firmware 65 INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler); 144 if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1) 151 rdev->vce.fb_version = (10 * (c[0] - '0')) + (c[1] - '0'); 155 start, mid, end, rdev->vce.fb_version); 157 rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8); 160 if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) && 161 (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) && 162 (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8)))) 173 &rdev->vce [all...] |
H A D | vce_v1_0.c | 33 #include "vce.h" 205 rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect); 218 uint64_t addr = rdev->vce.gpu_addr; 254 WREG32(VCE_LMI_FW_START_KEYSEL, rdev->vce.keyselect);
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H A D | vce_v2_0.c | 33 #include "vce.h" 160 uint64_t addr = rdev->vce.gpu_addr;
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H A D | radeon_kms.c | 546 *value = rdev->vce.fw_version; 549 *value = rdev->vce.fb_version;
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H A D | radeon_drv.c | 239 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)"); 240 module_param_named(vce, radeon_vce, int, 0444);
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H A D | radeon.h | 1537 /* vce clocks */ 1559 /* vce requirements */ 2427 struct radeon_vce vce; member in struct:radeon_device
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/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | amdgpu_vce.c | 91 * amdgpu_vce_sw_init - allocate memory, load vce firmware 161 r = amdgpu_ucode_request(adev, &adev->vce.fw, fw_name); 165 amdgpu_ucode_release(&adev->vce.fw); 169 hdr = (const struct common_firmware_header *)adev->vce.fw->data; 177 adev->vce.fw_version = ((version_major << 24) | (version_minor << 16) | 183 &adev->vce.vcpu_bo, 184 &adev->vce.gpu_addr, &adev->vce.cpu_addr); 191 atomic_set(&adev->vce.handles[i], 0); 192 adev->vce [all...] |
H A D | vce_v4_0.c | 37 #include "vce/vce_4_0_offset.h" 38 #include "vce/vce_4_0_default.h" 39 #include "vce/vce_4_0_sh_mask.h" 43 #include "ivsrcid/vce/irqsrcs_vce_4_0.h" 179 WDOORBELL32(adev->vce.ring[0].doorbell_index, 0); 180 *adev->vce.ring[0].wptr_cpu_addr = 0; 181 adev->vce.ring[0].wptr = 0; 182 adev->vce.ring[0].wptr_old = 0; 233 ring = &adev->vce.ring[0]; 263 adev->vce [all...] |
H A D | vce_v3_0.c | 33 #include "vce/vce_3_0_d.h" 34 #include "vce/vce_3_0_sh_mask.h" 83 if (adev->vce.harvest_config == 0 || 84 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) 86 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) 115 if (adev->vce.harvest_config == 0 || 116 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) 118 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) 146 if (adev->vce.harvest_config == 0 || 147 adev->vce [all...] |
H A D | amdgpu_vce_v2_0.c | 33 #include "vce/vce_2_0_d.h" 34 #include "vce/vce_2_0_sh_mask.h" 183 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); 243 ring = &adev->vce.ring[0]; 250 ring = &adev->vce.ring[1]; 281 DRM_INFO("vce is not idle \n"); 405 adev->vce.num_rings = 2; 420 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq); 433 for (i = 0; i < adev->vce.num_rings; i++) { 436 ring = &adev->vce [all...] |
H A D | amdgpu_kms.c | 209 fw_info->ver = adev->vce.fw_version; 210 fw_info->feature = adev->vce.fb_version; 413 for (i = 0; i < adev->vce.num_rings; i++) 414 if (adev->vce.ring[i].sched.ready) 821 if (adev->vce.fw_version && 822 adev->vce.fw_version < AMDGPU_VCE_FW_53_45) 845 dev_info->vce_harvest_config = adev->vce.harvest_config;
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H A D | amdgpu_virt.c | 549 POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_VCE, adev->vce.fw_version);
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H A D | amdgpu_ucode.c | 686 FW_VERSION_ATTR(vce_fw_version, 0444, vce.fw_version);
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H A D | amdgpu.h | 971 /* vce */ 972 struct amdgpu_vce vce; member in struct:amdgpu_device
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/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ |
H A D | smu8_hwmgr.h | 134 uint32_t vce : 1; member in struct:pp_disable_nb_ps_flags::__anon488::__anon489
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H A D | smu10_hwmgr.h | 111 uint32_t vce : 1; member in struct:pp_disable_nbpslo_flags::__anon492::__anon493
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/openbsd-current/gnu/usr.bin/perl/cpan/Unicode-Collate/ |
H A D | Collate.xs | 616 varCE (self, vce) 618 SV* vce; 639 v = (U8*)SvPV(vce, vlen);
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