Searched refs:spll_func_cntl_2 (Results 1 - 12 of 12) sorted by relevance

/openbsd-current/sys/dev/pci/drm/radeon/
H A Drv740_dpm.c125 u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2; local
150 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
151 spll_func_cntl_2 |= SCLK_MUX_SEL(2);
177 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
326 u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2; local
373 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
374 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
386 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
H A Drv730_dpm.c44 u32 spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2; local
81 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
82 spll_func_cntl_2 |= SCLK_MUX_SEL(2);
108 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
236 u32 spll_func_cntl_2; local
285 spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2;
291 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
292 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
303 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
H A Drv770_dpm.c493 u32 spll_func_cntl_2 = local
532 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
533 spll_func_cntl_2 |= SCLK_MUX_SEL(2);
559 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
931 u32 spll_func_cntl_2 = local
980 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
981 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
994 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
H A Dcypress_dpm.c1348 u32 spll_func_cntl_2 = local
1433 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
1434 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
1453 cpu_to_be32(spll_func_cntl_2);
H A Dni_dpm.c1801 u32 spll_func_cntl_2 = ni_pi->clock_registers.cg_spll_func_cntl_2; local
1900 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
1901 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
1913 table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
2006 u32 spll_func_cntl_2 = ni_pi->clock_registers.cg_spll_func_cntl_2; local
2033 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
2034 spll_func_cntl_2 |= SCLK_MUX_SEL(2);
2060 sclk->vCG_SPLL_FUNC_CNTL_2 = spll_func_cntl_2;
H A Dsi_dpm.c4475 u32 spll_func_cntl_2 = si_pi->clock_registers.cg_spll_func_cntl_2; local
4555 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
4556 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
4580 cpu_to_be32(spll_func_cntl_2);
4771 u32 spll_func_cntl_2 = si_pi->clock_registers.cg_spll_func_cntl_2; local
4797 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
4798 spll_func_cntl_2 |= SCLK_MUX_SEL(2);
4824 sclk->vCG_SPLL_FUNC_CNTL_2 = spll_func_cntl_2;
H A Dci_dpm.c2957 u32 spll_func_cntl_2 = pi->clock_registers.cg_spll_func_cntl_2; local
2986 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
2987 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
2990 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2;
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c1308 uint32_t spll_func_cntl_2 = data->clock_registers.vCG_SPLL_FUNC_CNTL_2; local
1347 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2, CG_SPLL_FUNC_CNTL_2,
1351 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2;
H A Diceland_smumgr.c1432 uint32_t spll_func_cntl_2 = data->clock_registers.vCG_SPLL_FUNC_CNTL_2; local
1465 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2,
1469 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2;
H A Dci_smumgr.c1386 uint32_t spll_func_cntl_2 = data->clock_registers.vCG_SPLL_FUNC_CNTL_2; local
1419 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2,
1423 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2;
H A Dtonga_smumgr.c1184 uint32_t spll_func_cntl_2 = data->clock_registers.vCG_SPLL_FUNC_CNTL_2; local
1214 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2, CG_SPLL_FUNC_CNTL_2,
1218 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2;
/openbsd-current/sys/dev/pci/drm/amd/pm/legacy-dpm/
H A Damdgpu_si_dpm.c4977 u32 spll_func_cntl_2 = si_pi->clock_registers.cg_spll_func_cntl_2; local
5058 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
5059 spll_func_cntl_2 |= SCLK_MUX_SEL(4);
5083 cpu_to_be32(spll_func_cntl_2);
5273 u32 spll_func_cntl_2 = si_pi->clock_registers.cg_spll_func_cntl_2; local
5299 spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
5300 spll_func_cntl_2 |= SCLK_MUX_SEL(2);
5326 sclk->vCG_SPLL_FUNC_CNTL_2 = spll_func_cntl_2;

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