Searched refs:snps (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/i915/display/
H A Dintel_ddi_buf_trans.c997 { .snps = { 25, 0, 0 } }, /* VS 0, pre-emph 0 */
998 { .snps = { 32, 0, 6 } }, /* VS 0, pre-emph 1 */
999 { .snps = { 35, 0, 10 } }, /* VS 0, pre-emph 2 */
1000 { .snps = { 43, 0, 17 } }, /* VS 0, pre-emph 3 */
1001 { .snps = { 35, 0, 0 } }, /* VS 1, pre-emph 0 */
1002 { .snps = { 45, 0, 8 } }, /* VS 1, pre-emph 1 */
1003 { .snps = { 48, 0, 14 } }, /* VS 1, pre-emph 2 */
1004 { .snps = { 47, 0, 0 } }, /* VS 2, pre-emph 0 */
1005 { .snps = { 55, 0, 7 } }, /* VS 2, pre-emph 1 */
1006 { .snps
[all...]
H A Dintel_ddi_buf_trans.h60 struct dg2_snps_phy_buf_trans snps; member in union:intel_ddi_buf_trans_entry
H A Dintel_display_core.h492 } snps; member in struct:intel_display
H A Dintel_snps_phy.c43 i915->display.snps.phy_failed_calibration |= BIT(phy);
77 val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_MAIN, trans->entries[level].snps.vswing);
78 val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_PRE, trans->entries[level].snps.pre_cursor);
79 val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_POST, trans->entries[level].snps.post_cursor);
H A Dintel_cx0_phy.c395 C10_PHY_OVRD_LEVEL(trans->entries[level].snps.pre_cursor),
399 C10_PHY_OVRD_LEVEL(trans->entries[level].snps.vswing),
403 C10_PHY_OVRD_LEVEL(trans->entries[level].snps.post_cursor),
H A Dintel_ddi.c4789 dev_priv->display.snps.phy_failed_calibration & BIT(phy)) {

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