Searched refs:regSDMA_RLC0_RB_WPTR (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gc_9_4_3.c101 WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_WPTR,
106 WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_WPTR,
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_2_offset.h418 #define regSDMA_RLC0_RB_WPTR 0x0135 macro

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