Searched refs:regSDMA1_QUEUE6_RB_BASE_HI_BASE_IDX (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h1563 #define regSDMA1_QUEUE6_RB_BASE_HI_BASE_IDX 0 macro
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H A Dgc_11_0_3_offset.h1575 #define regSDMA1_QUEUE6_RB_BASE_HI_BASE_IDX 0 macro
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