Searched refs:regSDMA0_QUEUE6_RB_WPTR_HI (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h718 #define regSDMA0_QUEUE6_RB_WPTR_HI 0x0296 macro
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H A Dgc_11_0_3_offset.h724 #define regSDMA0_QUEUE6_RB_WPTR_HI 0x0296 macro
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