Searched refs:regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsdma_v6_0.c506 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI),
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h242 #define regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI 0x00b2 macro
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H A Dgc_11_0_3_offset.h248 #define regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI 0x00b2 macro
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