Searched refs:regMPCC_MCM2_MPCC_MCM_3DLUT_READ_WRITE_CONTROL (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h6363 #define regMPCC_MCM2_MPCC_MCM_3DLUT_READ_WRITE_CONTROL 0x05ae macro
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H A Ddcn_3_2_1_offset.h6362 #define regMPCC_MCM2_MPCC_MCM_3DLUT_READ_WRITE_CONTROL 0x05ae macro
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