Searched refs:regGFX_IMU_PIC_INT_PRI_0 (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h11148 #define regGFX_IMU_PIC_INT_PRI_0 macro
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H A Dgc_11_0_3_offset.h11560 #define regGFX_IMU_PIC_INT_PRI_0 macro
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