Searched refs:regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dimu_v11_0_3.c55 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),
H A Dimu_v11_0.c201 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),
261 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h2702 #define regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END 0x15ae macro
[all...]
H A Dgc_11_0_3_offset.h2842 #define regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END 0x15ae macro
[all...]

Completed in 486 milliseconds