Searched refs:regCP_PFP_IC_BASE_CNTL (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v11_0.c2090 tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);
2095 WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);
2165 tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);
2169 WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);
2770 tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);
2774 WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h9714 #define regCP_PFP_IC_BASE_CNTL 0x5842 macro
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H A Dgc_11_0_3_offset.h10274 #define regCP_PFP_IC_BASE_CNTL macro
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