Searched refs:regCP_ME_IC_BASE_CNTL (Results 1 - 3 of 3) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | gfx_v11_0.c | 2046 tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);
2051 WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);
2287 tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);
2291 WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);
2988 tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);
2992 WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);
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| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
| H A D | gc_11_0_0_offset.h | 9722 #define regCP_ME_IC_BASE_CNTL 0x5846 macro
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| H A D | gc_11_0_3_offset.h | 10282 #define regCP_ME_IC_BASE_CNTL macro
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