Searched refs:mmVGA_RENDER_CONTROL (Results 1 - 22 of 22) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | gmc_v6_0.c | 244 tmp = RREG32(mmVGA_RENDER_CONTROL);
246 WREG32(mmVGA_RENDER_CONTROL, tmp);
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| H A D | vi.c | 603 vga_render_control = RREG32(mmVGA_RENDER_CONTROL);
617 WREG32(mmVGA_RENDER_CONTROL,
629 WREG32(mmVGA_RENDER_CONTROL, vga_render_control);
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| H A D | gmc_v7_0.c | 279 tmp = RREG32(mmVGA_RENDER_CONTROL);
281 WREG32(mmVGA_RENDER_CONTROL, tmp);
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| H A D | amdgpu_cik.c | 980 vga_render_control = RREG32(mmVGA_RENDER_CONTROL);
994 WREG32(mmVGA_RENDER_CONTROL,
1006 WREG32(mmVGA_RENDER_CONTROL, vga_render_control);
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| H A D | gmc_v8_0.c | 453 tmp = RREG32(mmVGA_RENDER_CONTROL);
455 WREG32(mmVGA_RENDER_CONTROL, tmp);
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| H A D | dce_v11_0.c | 476 tmp = RREG32(mmVGA_RENDER_CONTROL);
481 WREG32(mmVGA_RENDER_CONTROL, tmp);
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| H A D | dce_v10_0.c | 454 tmp = RREG32(mmVGA_RENDER_CONTROL);
459 WREG32(mmVGA_RENDER_CONTROL, tmp);
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| H A D | dce_v8_0.c | 391 tmp = RREG32(mmVGA_RENDER_CONTROL);
396 WREG32(mmVGA_RENDER_CONTROL, tmp);
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| H A D | dce_v6_0.c | 360 WREG32(mmVGA_RENDER_CONTROL,
361 RREG32(mmVGA_RENDER_CONTROL) & VGA_VSTATUS_CNTL);
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| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/ |
| H A D | dce_6_0_d.h | 4393 #define mmVGA_RENDER_CONTROL 0x00C0 macro
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| H A D | dce_8_0_d.h | 5133 #define mmVGA_RENDER_CONTROL 0xc0 macro
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| H A D | dce_10_0_d.h | 6016 #define mmVGA_RENDER_CONTROL 0xc0 macro
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| H A D | dce_11_2_d.h | 7767 #define mmVGA_RENDER_CONTROL 0xc0 macro
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| H A D | dce_11_0_d.h | 6093 #define mmVGA_RENDER_CONTROL 0xc0 macro
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| H A D | dce_12_0_offset.h | 554 #define mmVGA_RENDER_CONTROL 0x0000 macro
[all...] |
| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/ |
| H A D | dcn_3_0_3_offset.h | 17 #define mmVGA_RENDER_CONTROL 0x0000 macro
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| H A D | dcn_1_0_offset.h | 388 #define mmVGA_RENDER_CONTROL 0x0000 macro
[all...] |
| H A D | dcn_2_1_0_offset.h | 88 #define mmVGA_RENDER_CONTROL 0x0000 macro
[all...] |
| H A D | dcn_3_0_1_offset.h | 148 #define mmVGA_RENDER_CONTROL 0x0000 macro
[all...] |
| H A D | dcn_2_0_0_offset.h | 32 #define mmVGA_RENDER_CONTROL 0x0000 macro
[all...] |
| H A D | dcn_3_0_0_offset.h | 14 #define mmVGA_RENDER_CONTROL 0x0000 macro
[all...] |
| H A D | dcn_3_0_2_offset.h | 32 #define mmVGA_RENDER_CONTROL 0x0000 macro
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