Searched refs:mmUVD_RB_SIZE4_BASE_IDX (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h417 #define mmUVD_RB_SIZE4_BASE_IDX 1 macro
H A Dvcn_2_0_0_offset.h767 #define mmUVD_RB_SIZE4_BASE_IDX 1 macro
H A Dvcn_2_5_offset.h586 #define mmUVD_RB_SIZE4_BASE_IDX 1 macro
H A Dvcn_3_0_0_offset.h916 #define mmUVD_RB_SIZE4_BASE_IDX 1 macro

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