Searched refs:mmUVD_RB_BASE_LO2_BASE_IDX (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_offset.h85 #define mmUVD_RB_BASE_LO2_BASE_IDX 1 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h207 #define mmUVD_RB_BASE_LO2_BASE_IDX 1 macro
H A Dvcn_2_0_0_offset.h919 #define mmUVD_RB_BASE_LO2_BASE_IDX 1 macro
H A Dvcn_2_5_offset.h562 #define mmUVD_RB_BASE_LO2_BASE_IDX 1 macro
H A Dvcn_3_0_0_offset.h892 #define mmUVD_RB_BASE_LO2_BASE_IDX 1 macro

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