Searched refs:mmSQ_EDC_SEC_CNT (Results 1 - 8 of 8) sorted by relevance
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_4_1_offset.h | 162 #define mmSQ_EDC_SEC_CNT 0x03a3 macro
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H A D | gc_9_1_offset.h | 557 #define mmSQ_EDC_SEC_CNT 0x03a3 macro
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H A D | gc_9_0_offset.h | 563 #define mmSQ_EDC_SEC_CNT 0x03a3 macro
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/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | gfx_v9_4.c | 63 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_SEC_CNT), 0, 8, 16 },
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H A D | gfx_v8_0.c | 1481 mmSQ_EDC_SEC_CNT,
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H A D | gfx_v9_0.c | 4276 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_SEC_CNT), 0, 4, 16},
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/ |
H A D | gfx_8_0_d.h | 2097 #define mmSQ_EDC_SEC_CNT 0x23a1 macro
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H A D | gfx_8_1_d.h | 2065 #define mmSQ_EDC_SEC_CNT 0x23a1 macro
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