Searched refs:mmSQ_EDC_INFO (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h166 #define mmSQ_EDC_INFO 0x03a5 macro
H A Dgc_9_1_offset.h561 #define mmSQ_EDC_INFO 0x03a5 macro
H A Dgc_9_0_offset.h567 #define mmSQ_EDC_INFO 0x03a5 macro
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v9_4.c62 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_INFO), 0, 8, 16 },
H A Dgfx_v8_0.c1480 mmSQ_EDC_INFO,
6728 sq_edc_source = REG_GET_FIELD(RREG32(mmSQ_EDC_INFO), SQ_EDC_INFO, SOURCE);
H A Dgfx_v9_0.c4275 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_INFO), 0, 4, 16},
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h2099 #define mmSQ_EDC_INFO 0x23a3 macro
H A Dgfx_8_1_d.h2067 #define mmSQ_EDC_INFO 0x23a3 macro

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