Searched refs:mmSPI_START_PHASE (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h1661 #define mmSPI_START_PHASE 0x243b macro
H A Dgfx_8_1_d.h1629 #define mmSPI_START_PHASE 0x243b macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h645 #define mmSPI_START_PHASE 0x043b macro
H A Dgc_9_1_offset.h667 #define mmSPI_START_PHASE 0x043b macro
H A Dgc_9_0_offset.h683 #define mmSPI_START_PHASE 0x043b macro
H A Dgc_10_3_0_offset.h2672 #define mmSPI_START_PHASE 0x11db macro
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H A Dgc_10_1_0_offset.h2583 #define mmSPI_START_PHASE 0x11db macro
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/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v10_0.c3219 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_START_PHASE, 0x000000ff, 0x00000004),

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