Searched refs:mmSPI_SHADER_PGM_RSRC1_PS (Results 1 - 10 of 10) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1271 #define mmSPI_SHADER_PGM_RSRC1_PS 0x2C0A macro
H A Dgfx_7_0_d.h1635 #define mmSPI_SHADER_PGM_RSRC1_PS 0x2c0a macro
H A Dgfx_7_2_d.h1656 #define mmSPI_SHADER_PGM_RSRC1_PS 0x2c0a macro
H A Dgfx_8_0_d.h1849 #define mmSPI_SHADER_PGM_RSRC1_PS 0x2c0a macro
H A Dgfx_8_1_d.h1817 #define mmSPI_SHADER_PGM_RSRC1_PS 0x2c0a macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h2019 #define mmSPI_SHADER_PGM_RSRC1_PS 0x0c0a macro
H A Dgc_9_1_offset.h2085 #define mmSPI_SHADER_PGM_RSRC1_PS 0x0c0a macro
H A Dgc_9_0_offset.h1800 #define mmSPI_SHADER_PGM_RSRC1_PS 0x0c0a macro
H A Dgc_10_3_0_offset.h3824 #define mmSPI_SHADER_PGM_RSRC1_PS 0x19aa macro
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H A Dgc_10_1_0_offset.h4039 #define mmSPI_SHADER_PGM_RSRC1_PS 0x19aa macro
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