Searched refs:mmSDMA3_RLC1_RB_WPTR_POLL_ADDR_LO (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma3/
H A Dsdma3_4_2_2_offset.h512 #define mmSDMA3_RLC1_RB_WPTR_POLL_ADDR_LO 0x01bb macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_offset.h12109 #define mmSDMA3_RLC1_RB_WPTR_POLL_ADDR_LO macro
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