Searched refs:mmSDMA0_STATUS_REG (Results 1 - 17 of 17) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma0/ |
| H A D | sdma0_4_1_offset.h | 86 #define mmSDMA0_STATUS_REG 0x0025 macro
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| H A D | sdma0_4_0_offset.h | 88 #define mmSDMA0_STATUS_REG 0x0025 macro
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| H A D | sdma0_4_2_2_offset.h | 88 #define mmSDMA0_STATUS_REG 0x0025 macro
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| H A D | sdma0_4_2_offset.h | 88 #define mmSDMA0_STATUS_REG 0x0025 macro
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| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | sdma_v5_2.c | 1324 u32 tmp = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_STATUS_REG));
1340 sdma0 = RREG32(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG));
1341 sdma1 = RREG32(sdma_v5_2_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG));
1342 sdma2 = RREG32(sdma_v5_2_get_reg_offset(adev, 2, mmSDMA0_STATUS_REG));
1343 sdma3 = RREG32(sdma_v5_2_get_reg_offset(adev, 3, mmSDMA0_STATUS_REG));
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| H A D | sdma_v5_0.c | 1462 u32 tmp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_STATUS_REG));
1478 sdma0 = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG));
1479 sdma1 = RREG32(sdma_v5_0_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG));
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| H A D | vi.c | 676 {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET},
677 {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},
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| H A D | nv.c | 343 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
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| H A D | amdgpu_cik.c | 1052 {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET},
1053 {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},
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| H A D | sdma_v4_0.c | 1976 u32 tmp = RREG32_SDMA(i, mmSDMA0_STATUS_REG);
1993 sdma[j] = RREG32_SDMA(j, mmSDMA0_STATUS_REG);
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| H A D | soc15.c | 364 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
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| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/oss/ |
| H A D | oss_2_4_d.h | 169 #define mmSDMA0_STATUS_REG 0x340d macro
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| H A D | oss_2_0_d.h | 232 #define mmSDMA0_STATUS_REG 0x340d macro
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| H A D | oss_3_0_1_d.h | 166 #define mmSDMA0_STATUS_REG 0x340d macro
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| H A D | oss_3_0_d.h | 303 #define mmSDMA0_STATUS_REG 0x340d macro
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| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_3_0_offset.h | 70 #define mmSDMA0_STATUS_REG 0x0025 macro
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| H A D | gc_10_1_0_offset.h | 63 #define mmSDMA0_STATUS_REG 0x0025 macro
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