Searched refs:mmSDMA0_RLC5_CSA_ADDR_LO (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_2_2_offset.h844 #define mmSDMA0_RLC5_CSA_ADDR_LO 0x0314 macro
H A Dsdma0_4_2_offset.h840 #define mmSDMA0_RLC5_CSA_ADDR_LO 0x034c macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_offset.h854 #define mmSDMA0_RLC5_CSA_ADDR_LO 0x0314 macro
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H A Dgc_10_1_0_offset.h830 #define mmSDMA0_RLC5_CSA_ADDR_LO 0x034c macro
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