Searched refs:mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI (Results 1 - 10 of 10) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h430 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x01d2 macro
H A Dsdma0_4_0_offset.h518 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x01d2 macro
H A Dsdma0_4_2_2_offset.h518 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x01ba macro
H A Dsdma0_4_2_offset.h514 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x01d2 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h248 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x3586 macro
H A Doss_2_0_d.h297 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x3586 macro
H A Doss_3_0_1_d.h297 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x3586 macro
H A Doss_3_0_d.h416 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x3586 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_offset.h512 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x01ba macro
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H A Dgc_10_1_0_offset.h508 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI 0x01d2 macro
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