Searched refs:mmSDMA0_GFX_DOORBELL (Results 1 - 12 of 12) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h240 #define mmSDMA0_GFX_DOORBELL 0x0092 macro
H A Dsdma0_4_0_offset.h244 #define mmSDMA0_GFX_DOORBELL 0x0092 macro
H A Dsdma0_4_2_2_offset.h244 #define mmSDMA0_GFX_DOORBELL 0x0092 macro
H A Dsdma0_4_2_offset.h240 #define mmSDMA0_GFX_DOORBELL 0x0092 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_d.h232 #define mmSDMA0_GFX_DOORBELL 0x3492 macro
H A Doss_3_0_d.h357 #define mmSDMA0_GFX_DOORBELL 0x3492 macro
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsdma_v3_0.c694 doorbell = RREG32(mmSDMA0_GFX_DOORBELL + sdma_offsets[i]);
703 WREG32(mmSDMA0_GFX_DOORBELL + sdma_offsets[i], doorbell);
H A Dsdma_v5_0.c754 doorbell = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));
765 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL), doorbell);
H A Dsdma_v5_2.c557 doorbell = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));
567 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL), doorbell);
H A Dsdma_v4_0.c1078 doorbell = RREG32_SDMA(i, mmSDMA0_GFX_DOORBELL);
1086 WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_offset.h226 #define mmSDMA0_GFX_DOORBELL 0x0092 macro
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H A Dgc_10_1_0_offset.h238 #define mmSDMA0_GFX_DOORBELL 0x0092 macro
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