/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | sdma_v3_0.c | 83 mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000, 96 mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100, 114 mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100, 121 mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000, 135 mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000, 149 mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000, 164 mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100, 178 mmSDMA0_CLK_CTRL, 0xffffffff, 0x00000100, 1439 temp = data = RREG32(mmSDMA0_CLK_CTRL + sdma_offsets[i]); 1449 WREG32(mmSDMA0_CLK_CTRL [all...] |
H A D | amdgpu_cik_sdma.c | 882 WREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, 0x00000100); 883 WREG32(mmSDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, 0x00000100); 885 orig = data = RREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET); 888 WREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, data); 890 orig = data = RREG32(mmSDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET); 893 WREG32(mmSDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, data);
|
H A D | mxgpu_vi.c | 94 mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100, 225 mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100, 246 mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000,
|
H A D | sdma_v4_0.c | 91 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CLK_CTRL, 0xff000ff0, 0x3f000100), 139 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CLK_CTRL, 0xffffffff, 0x3f000100), 158 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CLK_CTRL, 0xffffffff, 0x3f000100), 284 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CLK_CTRL, 0xffffffff, 0x3f000100), 2189 def = data = RREG32_SDMA(i, mmSDMA0_CLK_CTRL); 2199 WREG32_SDMA(i, mmSDMA0_CLK_CTRL, data); 2203 def = data = RREG32_SDMA(i, mmSDMA0_CLK_CTRL); 2213 WREG32_SDMA(i, mmSDMA0_CLK_CTRL, data); 2288 data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CLK_CTRL));
|
H A D | sdma_v5_0.c | 1639 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); 1649 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); 1652 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); 1662 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); 1731 data = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_CLK_CTRL));
|
H A D | sdma_v5_2.c | 1551 def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); 1559 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); 1562 def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); 1570 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); 1648 data = RREG32(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_CLK_CTRL));
|
H A D | sdma_v2_4.c | 69 mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000, 76 mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100,
|
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma0/ |
H A D | sdma0_4_1_offset.h | 66 #define mmSDMA0_CLK_CTRL 0x001b macro
|
H A D | sdma0_4_0_offset.h | 68 #define mmSDMA0_CLK_CTRL 0x001b macro
|
H A D | sdma0_4_2_2_offset.h | 68 #define mmSDMA0_CLK_CTRL 0x001b macro
|
H A D | sdma0_4_2_offset.h | 68 #define mmSDMA0_CLK_CTRL 0x001b macro
|
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/oss/ |
H A D | oss_2_4_d.h | 160 #define mmSDMA0_CLK_CTRL 0x3403 macro
|
H A D | oss_2_0_d.h | 222 #define mmSDMA0_CLK_CTRL 0x3403 macro
|
H A D | oss_3_0_1_d.h | 157 #define mmSDMA0_CLK_CTRL 0x3403 macro
|
H A D | oss_3_0_d.h | 294 #define mmSDMA0_CLK_CTRL 0x3403 macro
|
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
H A D | gc_10_3_0_offset.h | 50 #define mmSDMA0_CLK_CTRL 0x001b macro [all...] |
H A D | gc_10_1_0_offset.h | 43 #define mmSDMA0_CLK_CTRL 0x001b macro [all...] |