Searched refs:mmSCRATCH_REG1 (Results 1 - 13 of 13) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h215 #define mmSCRATCH_REG1 0x2041 macro
H A Dgc_9_2_1_offset.h4829 #define mmSCRATCH_REG1 0x2041 macro
H A Dgc_9_1_offset.h4873 #define mmSCRATCH_REG1 0x2041 macro
H A Dgc_9_0_offset.h4643 #define mmSCRATCH_REG1 0x2041 macro
H A Dgc_10_3_0_offset.h6750 #define mmSCRATCH_REG1 0x2041 macro
[all...]
H A Dgc_10_1_0_offset.h7125 #define mmSCRATCH_REG1 0x2041 macro
[all...]
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1182 #define mmSCRATCH_REG1 0x2141 macro
H A Dgfx_7_0_d.h405 #define mmSCRATCH_REG1 0xc041 macro
H A Dgfx_7_2_d.h417 #define mmSCRATCH_REG1 0xc041 macro
H A Dgfx_8_0_d.h455 #define mmSCRATCH_REG1 0xc041 macro
H A Dgfx_8_1_d.h455 #define mmSCRATCH_REG1 0xc041 macro
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v9_0.c1639 reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG1);
H A Dgfx_v10_0.c4137 reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG1);

Completed in 848 milliseconds