Searched refs:mmRLC_PERFMON_CLK_CNTL (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h1354 #define mmRLC_PERFMON_CLK_CNTL 0xdcbf macro
H A Dgfx_8_1_d.h1357 #define mmRLC_PERFMON_CLK_CNTL 0xdcbf macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h6081 #define mmRLC_PERFMON_CLK_CNTL 0x3cbf macro
H A Dgc_9_1_offset.h6117 #define mmRLC_PERFMON_CLK_CNTL 0x3cbf macro
H A Dgc_9_0_offset.h5895 #define mmRLC_PERFMON_CLK_CNTL 0x3cbf macro
H A Dgc_10_3_0_offset.h8848 #define mmRLC_PERFMON_CLK_CNTL 0x3ce4 macro
[all...]
H A Dgc_10_1_0_offset.h9149 #define mmRLC_PERFMON_CLK_CNTL 0x3ce4 macro
[all...]
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v10_0.c4330 data = def = RREG32_SOC15(GC, 0, mmRLC_PERFMON_CLK_CNTL);
4338 WREG32_SOC15(GC, 0, mmRLC_PERFMON_CLK_CNTL, data);

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