Searched refs:mmRLC_LB_PARAMS (Results 1 - 13 of 13) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_si.c107 mmRLC_LB_PARAMS, 0xffffffff, 0x00601005,
154 mmRLC_LB_PARAMS, 0xffffffff, 0x00601004,
291 mmRLC_LB_PARAMS, 0xffffffff, 0x033f1005,
376 mmRLC_LB_PARAMS, 0xffffffff, 0x00601005,
H A Dgfx_v9_0.c1543 /* set mmRLC_LB_PARAMS = 0x003F_1006 */
1547 WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data);
1592 /* set mmRLC_LB_PARAMS = 0x003F_1006 */
1596 WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data);
H A Dgfx_v7_0.c3477 WREG32(mmRLC_LB_PARAMS, 0x00600408);
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1152 #define mmRLC_LB_PARAMS 0x3109 macro
H A Dgfx_7_0_d.h1289 #define mmRLC_LB_PARAMS 0x3111 macro
H A Dgfx_7_2_d.h1302 #define mmRLC_LB_PARAMS 0x3111 macro
H A Dgfx_8_0_d.h1402 #define mmRLC_LB_PARAMS 0xec51 macro
H A Dgfx_8_1_d.h1402 #define mmRLC_LB_PARAMS 0xec51 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h6259 #define mmRLC_LB_PARAMS 0x4c51 macro
H A Dgc_9_1_offset.h6283 #define mmRLC_LB_PARAMS 0x4c51 macro
H A Dgc_9_0_offset.h6061 #define mmRLC_LB_PARAMS 0x4c51 macro
H A Dgc_10_3_0_offset.h9231 #define mmRLC_LB_PARAMS 0x4c51 macro
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H A Dgc_10_1_0_offset.h9399 #define mmRLC_LB_PARAMS 0x4c51 macro
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