Searched refs:mmRDPCSTX0_RDPCSTX_PHY_CNTL0 (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_2_0_3_offset.h56 #define mmRDPCSTX0_RDPCSTX_PHY_CNTL0 0x2940 macro
H A Ddpcs_3_0_3_offset.h53 #define mmRDPCSTX0_RDPCSTX_PHY_CNTL0 0x2940 macro
H A Ddpcs_2_0_0_offset.h70 #define mmRDPCSTX0_RDPCSTX_PHY_CNTL0 0x2940 macro
H A Ddpcs_2_1_0_offset.h70 #define mmRDPCSTX0_RDPCSTX_PHY_CNTL0 0x2940 macro
H A Ddpcs_3_0_0_offset.h53 #define mmRDPCSTX0_RDPCSTX_PHY_CNTL0 0x2940 macro

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