Searched refs:mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_2_0_3_offset.h46 #define mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL 0x2932 macro
H A Ddpcs_3_0_3_offset.h35 #define mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL 0x2932 macro
H A Ddpcs_2_0_0_offset.h50 #define mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL 0x2932 macro
H A Ddpcs_2_1_0_offset.h50 #define mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL 0x2932 macro
H A Ddpcs_3_0_0_offset.h35 #define mmRDPCSTX0_RDPCSTX_INTERRUPT_CONTROL 0x2932 macro

Completed in 86 milliseconds