Searched refs:mmMP1_SMN_C2PMSG_83_BASE_IDX (Results 1 - 7 of 7) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_vbios_smu.c55 #define mmMP1_SMN_C2PMSG_83_BASE_IDX 0 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h285 #define mmMP1_SMN_C2PMSG_83_BASE_IDX 0 macro
H A Dmp_9_0_offset.h297 #define mmMP1_SMN_C2PMSG_83_BASE_IDX 0 macro
H A Dmp_12_0_0_offset.h285 #define mmMP1_SMN_C2PMSG_83_BASE_IDX 0 macro
H A Dmp_11_0_8_offset.h285 #define mmMP1_SMN_C2PMSG_83_BASE_IDX 0 macro
H A Dmp_11_0_offset.h287 #define mmMP1_SMN_C2PMSG_83_BASE_IDX 0 macro
H A Dmp_11_5_0_offset.h285 #define mmMP1_SMN_C2PMSG_83_BASE_IDX 0 macro

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