Searched refs:mmMP0_SMN_C2PMSG_36 (Results 1 - 9 of 9) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dpsp_v12_0.c96 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
135 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
H A Dpsp_v11_0.c199 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
245 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
418 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, data_32);
600 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, (fw_pri_mc_addr >> 20));
642 *fw_ver = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36);
H A Dpsp_v3_1.c102 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
141 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h36 #define mmMP0_SMN_C2PMSG_36 0x0064 macro
H A Dmp_9_0_offset.h36 #define mmMP0_SMN_C2PMSG_36 0x0064 macro
H A Dmp_12_0_0_offset.h36 #define mmMP0_SMN_C2PMSG_36 0x0064 macro
H A Dmp_11_0_8_offset.h36 #define mmMP0_SMN_C2PMSG_36 0x0064 macro
H A Dmp_11_0_offset.h36 #define mmMP0_SMN_C2PMSG_36 0x0064 macro
H A Dmp_11_5_0_offset.h36 #define mmMP0_SMN_C2PMSG_36 0x0064 macro

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