Searched refs:mmMMVM_L2_CNTL5 (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dmmhub_v2_0.c322 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL5, tmp);
H A Dmmhub_v2_3.c246 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL5, tmp);
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_2_0_0_offset.h1072 #define mmMMVM_L2_CNTL5 0x06a1 macro
H A Dmmhub_2_3_0_offset.h1454 #define mmMMVM_L2_CNTL5 0x0720 macro

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