Searched refs:mmMMMC_VM_MX_L1_TLB_CNTL (Results 1 - 4 of 4) sorted by relevance
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | mmhub_v2_0.c | 260 tmp = RREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL); 271 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp); 454 tmp = RREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL); 458 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp);
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H A D | mmhub_v2_3.c | 190 tmp = RREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL); 201 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp); 386 tmp = RREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL); 390 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp);
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/mmhub/ |
H A D | mmhub_2_0_0_offset.h | 1778 #define mmMMMC_VM_MX_L1_TLB_CNTL 0x0873 macro
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H A D | mmhub_2_3_0_offset.h | 1838 #define mmMMMC_VM_MX_L1_TLB_CNTL 0x08f3 macro
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