Searched refs:mmMC_SEQ_PMG_CMD_MRS_LP (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c2440 *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP;
2537 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP;
2627 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));
H A Dci_smumgr.c2513 *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP;
2610 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP;
2700 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));
H A Dtonga_smumgr.c2903 *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP;
3003 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP;
3103 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP,
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h920 #define mmMC_SEQ_PMG_CMD_MRS_LP 0x0AA2 macro
H A Dgmc_7_1_d.h822 #define mmMC_SEQ_PMG_CMD_MRS_LP 0xaa2 macro
H A Dgmc_8_1_d.h926 #define mmMC_SEQ_PMG_CMD_MRS_LP 0xaa2 macro

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