Searched refs:mmMAILBOX_MSGBUF_TRN_DW3_BASE_IDX (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h1140 #define mmMAILBOX_MSGBUF_TRN_DW3_BASE_IDX 0 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_offset.h2923 #define mmMAILBOX_MSGBUF_TRN_DW3_BASE_IDX 2 macro
H A Dnbio_7_0_offset.h4493 #define mmMAILBOX_MSGBUF_TRN_DW3_BASE_IDX 2 macro

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