Searched refs:mmIH_VMID_0_LUT (Results 1 - 17 of 17) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/oss/ |
| H A D | osssys_4_0_1_offset.h | 28 #define mmIH_VMID_0_LUT 0x0000 macro
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| H A D | osssys_4_0_offset.h | 28 #define mmIH_VMID_0_LUT 0x0000 macro
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| H A D | osssys_5_0_0_offset.h | 28 #define mmIH_VMID_0_LUT 0x0000 macro
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| H A D | osssys_4_2_0_offset.h | 30 #define mmIH_VMID_0_LUT 0x0000 macro
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| H A D | oss_2_4_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 macro
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| H A D | oss_2_0_d.h | 27 #define mmIH_VMID_0_LUT 0xf50 macro
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| H A D | oss_3_0_1_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 macro
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| H A D | oss_3_0_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 macro
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| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v7.c | 112 WREG32(mmIH_VMID_0_LUT + vmid, pasid_mapping);
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| H A D | amdgpu_amdkfd_gfx_v9.c | 134 WREG32(SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid,
1084 mmIH_VMID_0_LUT) + vmid);
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| H A D | amdgpu_amdkfd_gfx_v10_3.c | 104 WREG32(SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid, value);
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| H A D | amdgpu_amdkfd_gfx_v8.c | 107 WREG32(mmIH_VMID_0_LUT + vmid, pasid_mapping);
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| H A D | amdgpu_amdkfd_gfx_v10.c | 130 WREG32(SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid,
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| H A D | gmc_v10_0.c | 532 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid;
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| H A D | gmc_v7_0.c | 493 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid);
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| H A D | gmc_v9_0.c | 1093 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid;
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| H A D | gmc_v8_0.c | 684 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid);
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