Searched refs:mmGDS_WR_ADDR (Results 1 - 10 of 10) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h736 #define mmGDS_WR_ADDR 0x25C7 macro
H A Dgfx_7_0_d.h2169 #define mmGDS_WR_ADDR 0xc405 macro
H A Dgfx_7_2_d.h2190 #define mmGDS_WR_ADDR 0xc405 macro
H A Dgfx_8_0_d.h2388 #define mmGDS_WR_ADDR 0xc405 macro
H A Dgfx_8_1_d.h2367 #define mmGDS_WR_ADDR 0xc405 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h5267 #define mmGDS_WR_ADDR 0x2405 macro
H A Dgc_9_1_offset.h5309 #define mmGDS_WR_ADDR 0x2405 macro
H A Dgc_9_0_offset.h5079 #define mmGDS_WR_ADDR 0x2405 macro
H A Dgc_10_3_0_offset.h7230 #define mmGDS_WR_ADDR 0x2405 macro
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H A Dgc_10_1_0_offset.h7597 #define mmGDS_WR_ADDR 0x2405 macro
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