Searched refs:mmDSC_TOP4_DSC_DEBUG_CONTROL_BASE_IDX (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h12020 #define mmDSC_TOP4_DSC_DEBUG_CONTROL_BASE_IDX macro
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H A Ddcn_2_0_0_offset.h14151 #define mmDSC_TOP4_DSC_DEBUG_CONTROL_BASE_IDX macro
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H A Ddcn_3_0_0_offset.h13249 #define mmDSC_TOP4_DSC_DEBUG_CONTROL_BASE_IDX macro
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H A Ddcn_3_0_2_offset.h12093 #define mmDSC_TOP4_DSC_DEBUG_CONTROL_BASE_IDX macro
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