Searched refs:mmDMU_MEM_PWR_CNTL (Results 1 - 7 of 7) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h303 #define mmDMU_MEM_PWR_CNTL 0x00cc macro
H A Ddcn_1_0_offset.h930 #define mmDMU_MEM_PWR_CNTL 0x00cc macro
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H A Ddcn_2_1_0_offset.h558 #define mmDMU_MEM_PWR_CNTL 0x00cc macro
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H A Ddcn_3_0_1_offset.h502 #define mmDMU_MEM_PWR_CNTL 0x00cc macro
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H A Ddcn_2_0_0_offset.h596 #define mmDMU_MEM_PWR_CNTL 0x00cc macro
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H A Ddcn_3_0_0_offset.h482 #define mmDMU_MEM_PWR_CNTL 0x00cc macro
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H A Ddcn_3_0_2_offset.h470 #define mmDMU_MEM_PWR_CNTL 0x00cc macro
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