Searched refs:mmDIG5_AFMT_RAMP_CONTROL2_BASE_IDX (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9846 #define mmDIG5_AFMT_RAMP_CONTROL2_BASE_IDX 2 macro
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H A Ddcn_2_0_0_offset.h12527 #define mmDIG5_AFMT_RAMP_CONTROL2_BASE_IDX macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h11565 #define mmDIG5_AFMT_RAMP_CONTROL2_BASE_IDX macro
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