Searched refs:mmDC_PERFMON17_PERFMON_CNTL2_BASE_IDX (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h6188 #define mmDC_PERFMON17_PERFMON_CNTL2_BASE_IDX 2 macro
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H A Ddcn_2_1_0_offset.h9248 #define mmDC_PERFMON17_PERFMON_CNTL2_BASE_IDX 2 macro
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H A Ddcn_3_0_1_offset.h9701 #define mmDC_PERFMON17_PERFMON_CNTL2_BASE_IDX 2 macro
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H A Ddcn_2_0_0_offset.h8153 #define mmDC_PERFMON17_PERFMON_CNTL2_BASE_IDX 2 macro
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H A Ddcn_3_0_0_offset.h7968 #define mmDC_PERFMON17_PERFMON_CNTL2_BASE_IDX 2 macro
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H A Ddcn_3_0_2_offset.h8934 #define mmDC_PERFMON17_PERFMON_CNTL2_BASE_IDX 2 macro
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