Searched refs:mmDC_EDC_STATE_CNT (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h127 #define mmDC_EDC_STATE_CNT 0x1191 macro
H A Dgc_9_0_offset.h2651 #define mmDC_EDC_STATE_CNT 0x1191 macro
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v9_4.c45 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT), 0, 1, 1 },
128 { "CPC_DC_STATE_RAM_ME1", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT),
H A Dgfx_v9_0.c4268 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT), 0, 1, 1},
6019 { "DC_STATE", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT),
H A Dgfx_v8_0.c1472 mmDC_EDC_STATE_CNT,
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h2822 #define mmDC_EDC_STATE_CNT 0x3191 macro

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