Searched refs:mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20_BASE_IDX (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h12256 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20_BASE_IDX macro
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H A Ddcn_3_0_1_offset.h9523 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20_BASE_IDX 2 macro
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H A Ddcn_2_0_0_offset.h13261 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20_BASE_IDX macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h13617 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20_BASE_IDX macro
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