Searched refs:mmCP_PWR_CNTL (Results 1 - 10 of 10) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h492 #define mmCP_PWR_CNTL 0x3078 macro
H A Dgfx_7_0_d.h254 #define mmCP_PWR_CNTL 0x3078 macro
H A Dgfx_7_2_d.h256 #define mmCP_PWR_CNTL 0x3078 macro
H A Dgfx_8_0_d.h288 #define mmCP_PWR_CNTL 0x3078 macro
H A Dgfx_8_1_d.h288 #define mmCP_PWR_CNTL 0x3078 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h2695 #define mmCP_PWR_CNTL 0x1078 macro
H A Dgc_9_1_offset.h2757 #define mmCP_PWR_CNTL 0x1078 macro
H A Dgc_9_0_offset.h2480 #define mmCP_PWR_CNTL 0x1078 macro
H A Dgc_10_3_0_offset.h4482 #define mmCP_PWR_CNTL 0x1e18 macro
[all...]
H A Dgc_10_1_0_offset.h4819 #define mmCP_PWR_CNTL 0x1e18 macro
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