Searched refs:mmCP_MEC_ME1_UCODE_ADDR (Results 1 - 12 of 12) sorted by relevance
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/ |
H A D | gfx_7_0_d.h | 250 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
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H A D | gfx_7_2_d.h | 252 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
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H A D | gfx_8_0_d.h | 281 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
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H A D | gfx_8_1_d.h | 282 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
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/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | gfx_v7_0.c | 2669 WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0); 2672 WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0);
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H A D | gfx_v9_0.c | 3203 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 3209 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR,
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H A D | gfx_v10_0.c | 6282 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 0); 6288 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version);
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_2_1_offset.h | 6995 #define mmCP_MEC_ME1_UCODE_ADDR 0x581a macro
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H A D | gc_9_1_offset.h | 6967 #define mmCP_MEC_ME1_UCODE_ADDR 0x581a macro
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H A D | gc_9_0_offset.h | 6743 #define mmCP_MEC_ME1_UCODE_ADDR 0x581a macro
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H A D | gc_10_3_0_offset.h | 9961 #define mmCP_MEC_ME1_UCODE_ADDR 0x581a macro [all...] |
H A D | gc_10_1_0_offset.h | 10245 #define mmCP_MEC_ME1_UCODE_ADDR macro [all...] |
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